74CBTLVD3861
10-bit level-shifting bus switch with output enable
The 74CBTLVD3861 is a 10-bit 3.3 V to 1.8 V level translating bus switch with one output enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the switch is disabled.
To ensure the high-impedance OFF-state during power-up or power-down, OE should be tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined by the current?-?sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 3.0 V to 3.6 V.
This device is fully specified for partial power?-?down applications using IOFF.
Features and benefits
Supply voltage range from 3.0 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-B/JESD36 (3.0 V to 3.6 V)
4 Ω switch connection between two ports
3.3 V to 1.8 V level translation
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號(hào) | VCC (V) | VPASS (V) | Logic switching levels | RON (Ω) | f(-3dB) (MHz) | Nr of bits | tpd (ns) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74CBTLVD3861BQ | 3.0?-?3.6 | 1.8 | CMOS/LVTTL | 7 | 400 | 10 | 0.2 | very low | -40~125 | 72 | 7.6 | 45 | DHVQFN24 |
| 74CBTLVD3861PW | 3.0?-?3.6 | 1.8 | CMOS/LVTTL | 7 | 400 | 10 | 0.2 | very low | -40~125 | 128 | 32 | TSSOP24 |
封裝
| 型號(hào) | 可訂購的器件編號(hào)，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74CBTLVD3861BQ | 74CBTLVD3861BQ,118 (935294094118) |
Active | TLVD3861 |
DHVQFN24 (SOT815-1) |
SOT815-1 | SOT815-1_118 | |
| 74CBTLVD3861PW | 74CBTLVD3861PW,118 (935294095118) |
Active | BTLVD3861 |
TSSOP24 (SOT355-1) |
SOT355-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT355-1_118 |
環(huán)境信息
| 型號(hào) | 可訂購的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74CBTLVD3861BQ | 74CBTLVD3861BQ,118 | 74CBTLVD3861BQ |
|
|
| 74CBTLVD3861PW | 74CBTLVD3861PW,118 | 74CBTLVD3861PW |
|
|
文檔 (10)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74CBTLVD3861 | 10-bit level-shifting bus switch with output enable | Data sheet | 2024-06-24 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT815-1 | 3D model for products with SOT815-1 package | Design support | 2019-10-03 |
| SOT355-1 | 3D model for products with SOT355-1 package | Design support | 2020-01-22 |
| cbtlvd3861 | 74CBTLVD3861 IBIS model | IBIS model | 2013-06-13 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN24_SOT815-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 3.5 mm x 5.5 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SOT815-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 5.5 mm x 3.5 mm x 1 mm body | Package information | 2021-08-17 |
| SOT355-1 | plastic, thin shrink small outline package; 24 leads; 0.65 mm pitch; 7.8 mm x 4.4 mm x 1.2 mm body | Package information | 2024-11-15 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
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模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT815-1 | 3D model for products with SOT815-1 package | Design support | 2019-10-03 |
| SOT355-1 | 3D model for products with SOT355-1 package | Design support | 2020-01-22 |
| cbtlvd3861 | 74CBTLVD3861 IBIS model | IBIS model | 2013-06-13 |
Ordering, pricing & availability
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