可訂購部件
| 型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經(jīng)銷商處購買 |
|---|---|---|---|---|
| 74LV1T86GV | 74LV1T86GVH | 935690948125 | SOT753 | 訂單產(chǎn)品 |
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Click here for more information74LV1T86GV
2-input single supply translating EXCLUSIVE-OR gate
The 74LV1T86 is a single, level translating 2-input Exclusive-OR gate . The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V and 5.0 V CMOS levels. The wide VCC range permits the generation of output levels to connect to controllers or processors.
Features and benefits
Single supply voltage translator at 1.8 V, 2.5 V, 3.3 V and 5.0 V
Up translation
1.2 V to 1.8 V at VCC = 1.8 V
1.5 V to 2.5 V at VCC = 2.5 V
1.8 V to 3.3 V at VCC = 3.3 V
3.3 V to 5.0 V at VCC = 5.0 V
Down translation
3.3 V to 1.8 V at VCC = 1.8 V
3.3 V to 2.5 V at VCC = 2.5 V
5.0 V to 3.3 V at VCC = 3.3 V
5 V tolerant inputs
Latch-up performance exceeds 250 mA per JESD 78 Class II
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Applications
Portable applications
PC and notebooks
Industrial controller
Telecom
參數(shù)類型
| 型號 | VCC(A) (V) | VCC(B) (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | Category |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV1T86GV | 1.6?-?5.5 | n.a. | CMOS | ± 8 | 7.3 | 1 | low | -40~125 | 276 | 66.9 | 173 | TSOP5 | Uni-directional |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LV1T86GV | 74LV1T86GVH (935690948125) |
Active | SC |
TSOP5 (SOT753) |
SOT753 |
REFLOW_BG-BD-1
WAVE_BG-BD-1 |
SOT753_125 |
文檔 (12)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LV1T86 | 2-input single supply translating EXCLUSIVE-OR gate | Data sheet | 2023-12-14 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT753 | 3D model for products with SOT753 package | Design support | 2019-01-22 |
| lv1t86 | IBIS model of 74LV1T86 | IBIS model | 2018-01-19 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT753 | plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body | Package information | 2022-05-31 |
| SOT753_125 | TSOP5; Reel pack for SMD, 7"; Q3/T4 product orientation | Packing information | 2020-04-21 |
| 74LV1T86GV_Nexperia_Product_Reliability | 74LV1T86GV Nexperia Product Reliability | Quality document | 2025-03-20 |
| REFLOW_BG-BD-1 | Reflow soldering profile | Reflow soldering | 2021-04-06 |
| MAR_SOT753 | MAR_SOT753 Topmark | Top marking | 2013-06-03 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
訂購、定價與供貨
| 型號 | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
|---|---|---|---|---|---|---|
| 74LV1T86GV | 74LV1T86GVH | 935690948125 | Active | SOT753_125 | 3,000 |
|
樣品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.