74HC280; 74HCT280
9-bit odd/even parity generator/checker
The 74HC280; 74HCT280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8) is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Features and benefits
Word-length easily expanded by cascading
Generates either odd or even parity for nine data bits
Wide supply voltage range from 2.0 to 6.0 V
Input levels:
For 74HC280: CMOS level
For 74HCT280: TTL level
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|
| 74HC280D | 2.0?-?6.0 | CMOS | ± 5.2 | 17 | low | -40~125 | 73 | 1 | 30 | SO14 |
| 74HCT280D | 4.5?-?5.5 | TTL | ± 4 | 18 | low | -40~125 | 76 | 1 | 34 | SO14 |
| 74HCT280PW | 4.5?-?5.5 | TTL | ± 4 | 18 | low | -40~125 | TSSOP14 |
封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74HC280D | 74HC280D,653 (933713880653) |
Active | 74HC280D |
SO14 (SOT108-1) |
SOT108-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
暫無(wú)信息 |
| 74HCT280D | 74HCT280D,653 (933713890653) |
Active | 74HCT280D |
SO14 (SOT108-1) |
SOT108-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
暫無(wú)信息 |
| 74HCT280PW | 74HCT280PWJ (935691188118) |
Active | 4HCT280 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74HC280D | 74HC280D,653 | 74HC280D |
|
|
| 74HCT280D | 74HCT280D,653 | 74HCT280D |
|
|
| 74HCT280PW | 74HCT280PWJ | 74HCT280PW |
|
|
文檔 (15)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74HC_HCT280 | 9-bit odd/even parity generator/checker | Data sheet | 2024-01-15 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT108-1 | 3D model for products with SOT108-1 package | Design support | 2020-01-22 |
| SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SO14_SOT108-1_mk | plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body | Marcom graphics | 2017-01-28 |
| TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT108-1 | plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
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