可訂購(gòu)部件
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 訂購(gòu)代碼(12NC) | 封裝 | 從經(jīng)銷商處購(gòu)買 |
|---|---|---|---|---|
| 74AHC2G32DP-Q100 | 74AHC2G32DP-Q100H | 935301449125 | SOT505-2 | 訂單產(chǎn)品 |
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Click here for more information74AHC2G32DP-Q100
Dual 2-input OR gate
The 74AHC2G32; 74AHCT2G32 is a dual 2-input OR gate. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 to 5.5 V
Overvoltage tolerant inputs to 5.5 V
Input levels:
For 74AHC2G32: CMOS level
For 74AHCT2G32: TTL level
CMOS low power dissipation
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC2G32DP‑Q100 | 2.0?-?5.5 | CMOS | ± 8 | 3.2 | 60 | 2 | low | -40~125 | 218 | 20.9 | 106 | TSSOP8 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AHC2G32DP‑Q100 | 74AHC2G32DP‑Q100H (935301449125) |
Active | A32 |
TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74AHC2G32DP‑Q100 | 74AHC2G32DP‑Q100H | 74AHC2G32DP-Q100 |
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文檔 (11)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74AHC_AHCT2G32_Q100 | Dual 2-input OR gate | Data sheet | 2023-09-01 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11106 | Pin FMEA for AHC/AHCT family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
| ahc2g32 | ahc2g32 IBIS model | IBIS model | 2013-04-08 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
| SOT505-2_125 | TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2025-10-24 |
| 74AHC2G32DP-Q100_Nexperia_Product_Reliability | 74AHC2G32DP-Q100 Nexperia Product Reliability | Quality document | 2025-03-20 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
PCB Symbol, Footprint and 3D Model
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訂購(gòu)、定價(jià)與供貨
| 型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購(gòu)買 |
|---|---|---|---|---|---|---|
| 74AHC2G32DP‑Q100 | 74AHC2G32DP‑Q100H | 935301449125 | Active | SOT505-2_125 | 3,000 |
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樣品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.