74HC1G00-Q100; 74HCT1G00-Q100
2-input NAND gate
The 74HC1G00-Q100; 74HCT1G00-Q100 is a single 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
Input levels:
For 74HC1G00-Q100: CMOS level
For 74HCT1G00-Q100: TTL level
Symmetrical output impedance
High noise immunity
Balanced propagation delays
Latch-up performance exceeds 100 mA per JESD78 Class II Level B
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數(shù)類(lèi)型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC1G00GV-Q100 | 2.0?-?6.0 | CMOS | ± 2.6 | 7 | 36 | 1 | low | -40~125 | 220 | 33 | 131 | TSOP5 |
| 74HC1G00GW-Q100 | 2.0?-?6.0 | CMOS | ± 2.6 | 7 | 36 | 1 | low | -40~125 | 261 | 39.3 | 138 | TSSOP5 |
| 74HC1G00GZ-Q100 | 2.0?-?6.0 | CMOS | low | -40~125 | XSON5 | |||||||
| 74HCT1G00GV-Q100 | 4.5?-?5.5 | TTL | ± 2 | 10 | 36 | 1 | low | -40~125 | 220 | 33 | 131 | TSOP5 |
| 74HCT1G00GW-Q100 | 4.5?-?5.5 | TTL | ± 2 | 10 | 36 | 1 | low | -40~125 | 261 | 39.3 | 138 | TSSOP5 |
| 74HCT1G00GZ-Q100 | 4.5?-?5.5 | TTL | low | -40~125 | XSON5 |
封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74HC1G00GV-Q100 | 74HC1G00GV‑Q100H (935299983125) |
Active | H00 |
TSOP5 (SOT753) |
SOT753 |
WAVE_BG-BD-1
|
SOT753_125 |
| 74HC1G00GW-Q100 | 74HC1G00GW‑Q100H (935299984125) |
Active | HA |
TSSOP5 (SOT353-1) |
SOT353-1 |
WAVE_BG-BD-1
|
SOT353-1_125 |
| 74HC1G00GZ-Q100 | 74HC1G00GZ‑Q100YL (935691677315) |
Active | HA |
XSON5 (SOT8065-1) |
SOT8065-1 | SOT8065-1_315 | |
| 74HCT1G00GV-Q100 | 74HCT1G00GV‑Q100H (935299994125) |
Active | T00 |
TSOP5 (SOT753) |
SOT753 |
WAVE_BG-BD-1
|
SOT753_125 |
| 74HCT1G00GW-Q100 | 74HCT1G00GW‑Q100H (935299995125) |
Active | TA |
TSSOP5 (SOT353-1) |
SOT353-1 |
WAVE_BG-BD-1
|
SOT353-1_125 |
| 74HCT1G00GZ-Q100 | 74HCT1G00GZ‑Q100YL (935691728315) |
Active | TA |
XSON5 (SOT8065-1) |
SOT8065-1 | SOT8065-1_315 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74HC1G00GV-Q100 | 74HC1G00GV‑Q100H | 74HC1G00GV-Q100 |
|
|
| 74HC1G00GW-Q100 | 74HC1G00GW‑Q100H | 74HC1G00GW-Q100 |
|
|
| 74HC1G00GZ-Q100 | 74HC1G00GZ‑Q100YL | 74HC1G00GZ-Q100 |
|
|
| 74HCT1G00GV-Q100 | 74HCT1G00GV‑Q100H | 74HCT1G00GV-Q100 |
|
|
| 74HCT1G00GW-Q100 | 74HCT1G00GW‑Q100H | 74HCT1G00GW-Q100 |
|
|
| 74HCT1G00GZ-Q100 | 74HCT1G00GZ‑Q100YL | 74HCT1G00GZ-Q100 |
|
|
文檔 (18)
| 文件名稱(chēng) | 標(biāo)題 | 類(lèi)型 | 日期 |
|---|---|---|---|
| 74HC_HCT1G00_Q100 | 2-input NAND gate | Data sheet | 2025-03-14 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| mna097 | Block diagram: 74AHC1G00GV, 74AHC1G00GW, 74AHCT1G00GV, 74AHCT1G00GW, 74AUP1G132GF, 74AUP1G132GM, 74AUP1G132GW, 74HC1G00GV, 74HC1G00GW, 74HCT1G00GV, 74HCT1G00GW, 74LVC1G00GF, 74LVC1G00GM, 74LVC1G00GV, 74LVC1G00GW | Block diagram | 2009-11-03 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT753 | 3D model for products with SOT753 package | Design support | 2019-01-22 |
| SOT353-1 | 3D model for products with SOT353-1 package | Design support | 2019-09-23 |
| SOT8065-1 | 3D model for products with SOT8065-1 package | Design support | 2024-11-05 |
| hc1g00 | 74HC1G00 IBIS model | IBIS model | 2022-05-25 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| Leaflet_SOT8065_Minilogic | Leaflet_SOT8065 Minilogic | Leaflet | 2024-11-15 |
| TSSOP5_SOT353-1_mk | plastic, thin shrink small outline package; 5 leads; 0.65 mm pitch; 2 mm x 1.25 mm x 0.95 mm body | Marcom graphics | 2018-07-25 |
| SOT753 | plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body | Package information | 2022-05-31 |
| SOT353-1 | plastic thin shrink small outline package; 5 leads; body width 1.25 mm | Package information | 2022-11-15 |
| SOT8065-1 | Plastic thermal enhanced extremely thin small outline package withside-wettable flanks (SWF); no leads; 5 terminals; body 1.1 × 0.85 × 0.5mm | Package information | 2024-08-28 |
| MAR_SOT753 | MAR_SOT753 Topmark | Top marking | 2013-06-03 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
支持
如果您需要設(shè)計(jì)/技術(shù)支持，請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。
模型
| 文件名稱(chēng) | 標(biāo)題 | 類(lèi)型 | 日期 |
|---|---|---|---|
| SOT753 | 3D model for products with SOT753 package | Design support | 2019-01-22 |
| SOT353-1 | 3D model for products with SOT353-1 package | Design support | 2019-09-23 |
| SOT8065-1 | 3D model for products with SOT8065-1 package | Design support | 2024-11-05 |
| hc1g00 | 74HC1G00 IBIS model | IBIS model | 2022-05-25 |
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶(hù)，您可以通過(guò)我們的銷(xiāo)售機(jī)構(gòu)訂購(gòu)樣品。
如果您沒(méi)有 Nexperia 的直接賬戶(hù)，我們的全球和地區(qū)分銷(xiāo)商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷(xiāo)商列表。