74LVC1G98-Q100
Low-power configurable multiple function gate
The 74LVC1G98-Q100 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected to VCC or GND.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Latch-up performance exceeds 250 mA
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC1G98GV-Q100 | 1.65?-?5.5 | TTL | ± 32 | 6.3 | 150 | 1 | low | -40~125 | 237 | 43.9 | 150 | TSOP6 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC1G98GV-Q100 | 74LVC1G98GV‑Q100H (935691511125) |
Active | V98 |
TSOP6 (SOT457) |
SOT457 |
WAVE_BG-BD-1
|
SOT457_125 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC1G98GV-Q100 | 74LVC1G98GV‑Q100H | 74LVC1G98GV-Q100 |
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文檔 (9)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC1G98_Q100 | Low-power configurable multiple function gate | Data sheet | 2025-09-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT457 | 3D model for products with SOT457 package | Design support | 2022-11-04 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSOP6_SOT457_mk | plastic, surface-mounted package (TSOP6); 6 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body | Marcom graphics | 2017-01-28 |
| SOT457 | plastic, surface-mounted package (SC-74; TSOP6); 6 leads | Package information | 2023-03-03 |
| MAR_SOT457 | MAR_SOT457 Topmark | Top marking | 2013-06-03 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
支持
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模型
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| SOT457 | 3D model for products with SOT457 package | Design support | 2022-11-04 |
Ordering, pricing & availability
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