74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
The 74LVT16652A is a high-performance BiCMOS product designed for VCC operation at 3.3 V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.
Complimentary output enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A LOW input level selects real-time data, and a HIGH input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.
Data on the A or B bus, or both, can be stored in the internal flip-flops by LOW-to-HIGH transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the select control or output enable inputs. When SAB and SBA are in real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high- impedance, each set of bus lines remains at its last level configuration.
Features and benefits
- 16-bit bus interface
- 3-state buffers
- Output capability: +64 mA and -32 mA
- TTL input and output switching levels
- Input and output interface capability to systems at 5 V supply
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion and extraction permitted
- Power-up reset
- Power-up 3-state
- No bus current loading when output is tied to 5 V bus
- Latch-up protection exceeds 500 mA per JESD78
- ESD protection:
- MIL STD 883 method 3015: exceeds 2000 V
- Machine model: exceeds 200 V
Applications
參數(shù)類型
| 型號 |
|---|
封裝
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVT16652ADGG | 74LVT16652ADGG,112 (935204700112) |
Obsolete | LVT16652A Standard Procedure Standard Procedure |
TSSOP56 (SOT364-1) |
SOT364-1 |
SSOP-TSSOP-VSO-WAVE
|
暫無信息 |
| 74LVT16652ADGG,118 (935204700118) |
Obsolete | LVT16652A Standard Procedure Standard Procedure | SOT364-1_118 | ||||
| 74LVT16652ADGGS (935204700512) |
Obsolete | LVT16652A Standard Procedure Standard Procedure | 暫無信息 | ||||
| 74LVT16652ADGGY (935204700518) |
Obsolete | LVT16652A Standard Procedure Standard Procedure | 暫無信息 |
環(huán)境信息
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVT16652ADGG | 74LVT16652ADGG,112 | 74LVT16652ADGG |
|
|
| 74LVT16652ADGG | 74LVT16652ADGG,118 | 74LVT16652ADGG |
|
|
| 74LVT16652ADGG | 74LVT16652ADGGS | 74LVT16652ADGG |
|
|
| 74LVT16652ADGG | 74LVT16652ADGGY | 74LVT16652ADGG |
|
|
文檔 (8)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LVT16652A | 3.3 V 16-bit bus transceiver/register; 3-state | Data sheet | 2005-01-11 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
| lvt16652a | lvt16652a IBIS model | IBIS model | 2013-04-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT364-1 | plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body | Package information | 2022-06-23 |
| lvt16 | lvt16 Spice model | SPICE model | 2013-05-07 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
如果您需要設(shè)計/技術(shù)支持，請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機(jī)構(gòu)訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。