HEF4518B
Dual BCD counter
The HEF4518B is a dual 4-bit internally synchronous BCD counter. The counter has two clock inputs (CP0 and CP1 ), buffered outputs from all four bit positions (O0 to O3) and an asynchronous master reset input (MR). The counter advances on either the LOW to HIGH transition of the CP0 input if CP1 is HIGH or the HIGH to LOW transition of the CP1 input if CP0 is LOW. Either CP0 or CP1 may be used as the clock input to the counter and the other clock input may be used as a clock enable input. A HIGH on MR resets the counter (O0 to O3 = LOW) independent of CP0 and CP1. Schmitt-trigger action in the clock inputs makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD.
Features and benefits
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
- ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C
Applications
Multistage synchronous counting
Multistage asynchronous counting
Frequency dividers
參數(shù)類型
| 型號(hào) | VCC (V) | Output drive capability (mA) | Logic switching levels | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| HEF4518BT | 3.0?-?15 | ± 2.4 | CMOS | 40 | 40 | medium | -40~85 | 77 | 2.7 | 35.1 | SO16 |
封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| HEF4518BT | HEF4518BT,653 (933373230653) |
Active | HEF4518BT |
SO16 (SOT109-1) |
SOT109-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
暫無信息 |
環(huán)境信息
品質(zhì)及可靠性免責(zé)聲明
文檔 (11)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| HEF4518B | Dual BCD counter | Data sheet | 2024-09-05 |
| AN11051 | Pin FMEA HEF4000 family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| 001aae700 | Block diagram: HEF4518BP, HEF4518BT | Block diagram | 2009-11-03 |
| SOT109-1 | 3D model for products with SOT109-1 package | Design support | 2020-01-22 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SO16_SOT109-1_mk | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.35 mm body | Marcom graphics | 2017-01-28 |
| SOT109-1 | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
支持
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模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT109-1 | 3D model for products with SOT109-1 package | Design support | 2020-01-22 |
Ordering, pricing & availability
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