74ALVCH16825
18-bit buffer/driver; 3-state
The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with 3-state outputs for bus-oriented applications. The 74ALVCH16825 consists of two 9-bit sections with separate output enable signals. For either 9-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be LOW for corresponding nYn outputs to be active. If either output enable input is HIGH, the outputs of that 9-buffer section are in the high impedance state.
The 74ALVCH16825 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
Features and benefits
Wide supply voltage range of 1.2 V to 3.6 V
CMOS low power dissipation
MULTIBYTE? flow-through standard pin-out architecture
Low inductance multiple VCC and GND pins for minimum noise and ground bounce
Direct interface with TTL levels
Bus hold on data inputs
Output drive capability 50 ? transmission lines at 85 °C
Current drive ± 24 mA at 3.0 V
Latch-up performance exceeds 250 mA per JESD 78 Class II.A
Complies with JEDEC standards:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C/JESD36 (2.7 V to 3.6 V)
-
ESD specifications:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C
參數(shù)類(lèi)型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|
| 74ALVCH16825DGG | 1.2?-?3.6 | LVTTL | ± 24 | 150 | 18 | low | -40~85 | 93 | TSSOP56 |
封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74ALVCH16825DGG | 74ALVCH16825DGG:11 (935259050118) |
Active | ALVCH16825 |
TSSOP56 (SOT364-1) |
SOT364-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT364-1_118 |
下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74ALVCH16825DGG | 74ALVCH16825DGGY (935259050518) |
Withdrawn / End-of-life | ALVCH16825 |
TSSOP56 (SOT364-1) |
SOT364-1 |
SSOP-TSSOP-VSO-WAVE
|
暫無(wú)信息 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74ALVCH16825DGG | 74ALVCH16825DGG:11 | 74ALVCH16825DGG |
|
|
下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74ALVCH16825DGG | 74ALVCH16825DGGY | 74ALVCH16825DGG |
|
|
文檔 (8)
| 文件名稱(chēng) | 標(biāo)題 | 類(lèi)型 | 日期 |
|---|---|---|---|
| 74ALVCH16825 | 18-bit buffer/driver; 3-state | Data sheet | 2024-07-10 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| sh00140 | Block diagram: 74ALVCH16825DGG | Block diagram | 2009-11-04 |
| SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
| alvch16825 | alvch16825 IBIS model | IBIS model | 2013-04-08 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT364-1 | plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body | Package information | 2022-06-23 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
如果您需要設(shè)計(jì)/技術(shù)支持，請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。
模型
| 文件名稱(chēng) | 標(biāo)題 | 類(lèi)型 | 日期 |
|---|---|---|---|
| SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
| alvch16825 | alvch16825 IBIS model | IBIS model | 2013-04-08 |
Ordering, pricing & availability
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