74ALVCH16952
16-bit registered transceiver; 3-state
The 74ALVCH16952 consists of two sections, each containing a dual octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the clock (nCPAB and nCPBA) provided that the clock enable (nCEAB and nCEBA) is LOW. The data is then present at the output buffers, but is only accessible when the output enable input (nOEAB and nOEBA) is LOW. Data flow from A inputs to B outputs is the same as for B inputs to A outputs.
Features and benefits
CMOS low-power consumption
MULTIBYTE? flow-through pinout architecture
Low inductance, multiple center power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
Output drive capability 50 Ω transmission lines at 85 °C
Complies with JEDEC standard JESD8-B
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 °C to +85 °C
參數(shù)類型
| 型號 | VCC(A) (V) | VCC(B) (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74ALVCH16952DGG | n.a. | n.a. | TTL | ± 24 | 3.2 | 16 | 150 | low | -40~85 | 93 | TSSOP56 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74ALVCH16952DGG | 74ALVCH16952DGG,11 (935262801118) |
Active | ALVCH16952 |
TSSOP56 (SOT364-1) |
SOT364-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT364-1_118 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74ALVCH16952DGG | 74ALVCH16952DGG,11 | 74ALVCH16952DGG |
|
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文檔 (7)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74ALVCH16952 | 16-bit registered transceiver; 3-state | Data sheet | 2024-07-10 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
| alvch16952 | alvch16952 IBIS model | IBIS model | 2013-04-08 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT364-1 | plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body | Package information | 2022-06-23 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
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模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
| alvch16952 | alvch16952 IBIS model | IBIS model | 2013-04-08 |
Ordering, pricing & availability
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