可訂購(gòu)部件
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 訂購(gòu)代碼(12NC) | 封裝 | 從經(jīng)銷商處購(gòu)買 |
|---|---|---|---|---|
| 74LVC162244ADGG | 74LVC162244ADGG:11 | 935237680118 | SOT362-1 | 訂單產(chǎn)品 |
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Click here for more information74LVC162244ADGG
16-bit buffer/line driver; 30 Ohm series termination resistors; 5 V tolerant input/output; 3-state
The 74LVC162244A; 74LVCH162244A is a 16-bit buffer/line driver with 30 Ω termination resistors and 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
The 74LVCH162244A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
Features and benefits
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
Multibyte flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
All data inputs have bus hold. (74LVCH162244A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC162244ADGG | 1.2?-?3.6 | CMOS/LVTTL | ± 24 | 175 | 16 | low | -40~125 | 82 | 2 | 37 | TSSOP48 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC162244ADGG | 74LVC162244ADGG:11 (935237680118) |
Active | LVC162244A |
TSSOP48 (SOT362-1) |
SOT362-1 |
SSOP-TSSOP-VSO-WAVE
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SOT362-1_118 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC162244ADGG | 74LVC162244ADGG:11 | 74LVC162244ADGG |
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Series
文檔 (12)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC_LVCH162244A | 16-bit buffer/line driver; 30 Ohm series termination resistors; 5?V?tolerant?input/output; 3-state | Data sheet | 2024-04-26 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
| lvc162244a | lvc162244a IBIS model | IBIS model | 2013-04-08 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP48_SOT362-1_mk | plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body | Marcom graphics | 2017-01-28 |
| SOT362-1 | plastic thin shrink small outline package; 48 leads; body width 6.1 mm | Package information | 2024-01-05 |
| SOT362-1_118 | TSSOP48; Reel pack for SMD, 13''; Q1/T1 product orientation | Packing information | 2025-07-24 |
| 74LVC162244ADGG_Nexperia_Product_Reliability | 74LVC162244ADGG Nexperia Product Reliability | Quality document | 2025-03-20 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| lvc162244a | lvc162244a IBIS model | IBIS model | 2013-04-08 |
| SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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訂購(gòu)、定價(jià)與供貨
| 型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購(gòu)買 |
|---|---|---|---|---|---|---|
| 74LVC162244ADGG | 74LVC162244ADGG:11 | 935237680118 | Active | SOT362-1_118 | 2,000 |
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樣品
作為 Nexperia 的客戶，您可以通過(guò)我們的銷售機(jī)構(gòu)訂購(gòu)樣品。
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.