可訂購部件
| 型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經(jīng)銷商處購買 |
|---|---|---|---|---|
| 74LVCH16245ADGG | 74LVCH16245ADGG,11 | 935238470118 | SOT362-1 | 訂單產(chǎn)品 |
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Click here for more information74LVCH16245ADGG
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state
The 74LVC16245A; 74LVCH16245A is a 16-bit transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
The 74LVCH16245A bus hold on data inputs eliminates the need for external pull?-?up resistors to hold unused inputs.
Alternatives
Features and benefits
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
All data inputs have bus hold (74LVCH16245A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號 | VCC(A) (V) | VCC(B) (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVCH16245ADGG | n.a. | n.a. | CMOS/LVTTL | ± 24 | 3.0 | 16 | 175 | low | -40~125 | 82 | 1.9 | 36 | TSSOP48 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVCH16245ADGG | 74LVCH16245ADGG,11 (935238470118) |
Active | LVCH16245A LVCH16245A Standard Procedure Standard Procedure |
TSSOP48 (SOT362-1) |
SOT362-1 |
SSOP-TSSOP-VSO-WAVE
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SOT362-1_118 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVCH16245ADGG | 74LVCH16245ADGG,11 | 74LVCH16245ADGG |
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Series
文檔 (11)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC_LVCH16245A | 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state | Data sheet | 2024-04-23 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
| lvch16245a | lvch16245a IBIS model | IBIS model | 2013-04-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP48_SOT362-1_mk | plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body | Marcom graphics | 2017-01-28 |
| SOT362-1 | plastic thin shrink small outline package; 48 leads; body width 6.1 mm | Package information | 2024-01-05 |
| SOT362-1_118 | TSSOP48; Reel pack for SMD, 13''; Q1/T1 product orientation | Packing information | 2025-07-24 |
| 74LVCH16245ADGG_Nexperia_Product_Reliability | 74LVCH16245ADGG Nexperia Product Reliability | Quality document | 2025-03-20 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| lvch16245a | lvch16245a IBIS model | IBIS model | 2013-04-09 |
| SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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訂購、定價與供貨
| 型號 | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
|---|---|---|---|---|---|---|
| 74LVCH16245ADGG | 74LVCH16245ADGG,11 | 935238470118 | Active | SOT362-1_118 | 2,000 |
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樣品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.