74HC2G34-Q100; 74HCT2G34-Q100
Dual buffer gate
The 74HC2G34-Q100; 74HCT2G34-Q100 is a dual buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
High noise immunity
CMOS low power dissipation
Balanced propagation delays
Unlimited input rise and fall times
Input levels:
For 74HC2G34-Q100: CMOS level
For 74HCT2G34-Q100: TTL level
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC2G34GV-Q100 | 2.0?-?6.0 | CMOS | ± 5.2 | 36 | 2 | low | -40~125 | 248 | 52.7 | 160 | TSOP6 |
| 74HC2G34GW-Q100 | 2.0?-?6.0 | CMOS | ± 5.2 | 36 | 2 | low | -40~125 | 275 | 48.5 | 163 | TSSOP6 |
| 74HCT2G34GV-Q100 | 4.5?-?5.5 | TTL | ± 4 | 36 | 2 | low | -40~125 | 248 | 52.7 | 160 | TSOP6 |
| 74HCT2G34GW-Q100 | 4.5?-?5.5 | TTL | ± 4 | 32 | 2 | low | -40~125 | 275 | 48.5 | 163 | TSSOP6 |
封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74HC2G34GV-Q100 | 74HC2G34GV‑Q100H (935302025125) |
Active | P34 |
TSOP6 (SOT457) |
SOT457 |
WAVE_BG-BD-1
|
SOT457_125 |
| 74HC2G34GW-Q100 | 74HC2G34GW‑Q100H (935301353125) |
Active | PA |
TSSOP6 (SOT363-2) |
SOT363-2 | SOT363-2_125 | |
| 74HCT2G34GV-Q100 | 74HCT2G34GV‑Q100H (935301358125) |
Active | U34 |
TSOP6 (SOT457) |
SOT457 |
WAVE_BG-BD-1
|
SOT457_125 |
| 74HCT2G34GW-Q100 | 74HCT2G34GW‑Q100H (935301184125) |
Active | UA |
TSSOP6 (SOT363-2) |
SOT363-2 | SOT363-2_125 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74HC2G34GV-Q100 | 74HC2G34GV‑Q100H | 74HC2G34GV-Q100 |
|
|
| 74HC2G34GW-Q100 | 74HC2G34GW‑Q100H | 74HC2G34GW-Q100 |
|
|
| 74HCT2G34GV-Q100 | 74HCT2G34GV‑Q100H | 74HCT2G34GV-Q100 |
|
|
| 74HCT2G34GW-Q100 | 74HCT2G34GW‑Q100H | 74HCT2G34GW-Q100 |
|
|
文檔 (13)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74HC_HCT2G34_Q100 | Dual buffer gate | Data sheet | 2023-12-04 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT457 | 3D model for products with SOT457 package | Design support | 2022-11-04 |
| SOT363-2 | 3D model for products with SOT363-2 package | Design support | 2023-02-02 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSOP6_SOT457_mk | plastic, surface-mounted package (TSOP6); 6 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body | Marcom graphics | 2017-01-28 |
| SOT457 | plastic, surface-mounted package (SC-74; TSOP6); 6 leads | Package information | 2023-03-03 |
| SOT363-2 | plastic thin shrink small outline package; 6 leads; body width 1.25 mm | Package information | 2022-11-21 |
| MAR_SOT457 | MAR_SOT457 Topmark | Top marking | 2013-06-03 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
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